
HOUGHTON — A Michigan Technological University professor has received a $400,000 Faculty Early Career Development (CAREER) award from the National Science Foundation for his work on software used to design microscopic features in today’s computer chips.
Long ago, human beings wired computer circuitry by hand. Then along came integrated circuits, and now the technology is so advanced that tens of billions of transistors can be put on a single chip no bigger than a dime.
The complexity of these nanoscale integrated circuits makes it difficult to make the most of their design, says Zhuo Feng, an assistant professor of electrical and computer engineering at Michigan Tech. That’s because software used to design computer chips hasn’t kept pace with the hardware in these emerging computing systems.
Today’s computer systems incorporate two different kinds of processors: traditional central processing units, or CPUs, and newer graphics processing units, or GPUs. Each brings something to the party. CPUs are flexible, and GPUs are blindingly fast.
Now, with the help of the CAREER Award from NSF, Feng aims to develop new computer aided design (CAD) algorithms that will help chip designers use the powerful heterogeneous computing platforms to do their job better — and in a fraction of the time.
“We are trying to develop software that will enable chip designers to automate the design procedures more efficiently than ever before,” said Feng. “To this end, we will develop efficient CAD algorithms to precisely model and simulate an integrated circuit system with billions of transistors, and, more importantly, verify the whole integrated system before the chip is manufactured.”
Their new algorithms will let chip designers finish their tasks more quickly, he said.
“That will save a lot of time, and eventually that is money,” Feng sadi. “And if you can finish the simulation job in one hour, compared to the old tools that can take a week, you can also save a lot of energy, and that is money too.”
The title of Feng’s proposal is “CAREER: Leverage Heterogeneous Manycore Systems for Scalable Modeling, Simulation and Verification of Nanoscale Integrated Circuits.”
More at www.mtu.edu.